News Article
ST Shrinks Flash
STMicroelectronics’ first 0.13µm Flash memories are being supplied in engineering sample quantities. Ramp to volume will begin in Q4, 2002. The devices were developed at ST’s Center of Excellence for Non Volatile Memories in Agrate, Italy.
The area of each memory cell has been reduced to 0.16µm2 - a 50% size reduction from the previous generation. The on-chip peripheral CMOS circuitry has been optimised for the 1.8V power supply range used in mobile phones and other wireless applications.
A new surface channel transistor design features cobalt salicide and a triple-metal interconnect scheme. Transistor driving currents have been more than doubled compared with the devices used in the current 0.15µm technology.
The process uses well-proven 248nm lithography and aluminum metal interconnects. Ramp-up in Agrate will be followed by ST's fabs in Catania and Singapore. All three fabs currently mass produce 0.15µm Flash memories.
The first 0.13µm product is a 1.8V, 64Mbit device featuring a multiple bank architecture and synchronous burst read mode. This is targeted at the 3G mobile phone market. This will be followed by 128Mbit and higher density products.
