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TSMC says that it has demonstrated working transistors with a 35nm gate
length based on a new variation of the field effect transistor (FET) called
a FinFET because it resembles the backfin of a fish.
The device will be
presented at the Symposium on VLSI Technology in Honolulu, Hawaii. Chief
technology officer Dr Chenming Hu reports that TSMC has recently further
improved the FinFET, creating gate lengths below 25nm with yet higher
performance. TSMC researchers have also simulated the structure and claim it
can operate within generally acceptable parameters at gate lengths as small
as 9nm. The FinFET is a double gate device so that both sides of the
source-to-drain channel are closed down at the same time.
Samsung Semiconductor has developed a hafnium dioxide-aluminum oxide
laminate high-k gate/capacitor dielectric film using atomic layer deposition
(ALD). The film produces a higher capacitance than that of the tantalum
oxide being used by others. Samsung also says use of the film decreases the
number of process steps needed for capacitor formation with a low thermal
budget. Samsung presented details at the VLSI Technology Symposium.
presented at the Symposium on VLSI Technology in Honolulu, Hawaii. Chief
technology officer Dr Chenming Hu reports that TSMC has recently further
improved the FinFET, creating gate lengths below 25nm with yet higher
performance. TSMC researchers have also simulated the structure and claim it
can operate within generally acceptable parameters at gate lengths as small
as 9nm. The FinFET is a double gate device so that both sides of the
source-to-drain channel are closed down at the same time.
Samsung Semiconductor has developed a hafnium dioxide-aluminum oxide
laminate high-k gate/capacitor dielectric film using atomic layer deposition
(ALD). The film produces a higher capacitance than that of the tantalum
oxide being used by others. Samsung also says use of the film decreases the
number of process steps needed for capacitor formation with a low thermal
budget. Samsung presented details at the VLSI Technology Symposium.