More IEDM Presentations
The presentations include three papers on extending the design and fabrication of DRAM chips to feature sizes of less than 70nm. Several additional papers covered advances in silicon germanium circuit fabrication (a 5psec bipolar transistor), micro-electo-mechanical systems (MEMS) for radio frequency applications (with Nokia), printing circuits on plastic films and completely electronic detection of DNA samples using integrated "biochip" CMOS circuits.
One of the memory technology papers described a fully depleted surrounding gate transistor (SGT) for 70nm DRAM and beyond. The vertical array device potentially enables memory chips with more than 200% greater capacity than today without changing the size of the chip.
Another of the memory developments is a fully integrated Al2O3 trench capacitor DRAM for a sub-100nm process. Using Al2O3 as a "high-k" capacitor dielectric in the trench DRAM process aims at replacing todays standard nitride-oxide. The final DRAM paper is on feature scale models of trench capacitor etch rate and profile to enable efficient design of high-density trench technology DRAM memory arrays.
In their paper on polymer gate dielectric pentacene thin film transistors (TFTs) and circuits on flexible substrates, Infineon researchers and industry partners have developed what they think may be the fastest circuits ever fabricated on flexible organic (and thus low-cost) polymer materials.