Process Development
double data rate 400Mbits/sec (DDR400) specification. Among the chip
manufacturers with DDR400 products are Germanys Infineon Technologies,
South Koreas Samsung and Hynix and Japans Elpida (former joint venture of
NEC and Hitachi).
DDR400 is supported by Intels coming Springdale chipset with an 800MHz
front side bus architecture.
Modules have been validated as compliant with Intel specifications and
designed to meet the requirements of the proposed JEDEC PC3200 3.2Gbyte/sec
bandwidth specification for use in the main memory of high-performance
desktop PCs and workstations.
Infineons products have been built in its 0.14micron process running in
full production volume throughout the companys 300mm and 200mm DRAM fab
cluster. PC3200 DIMMs and memory chips from Infineon are available now.
Samsung used its 0.13micron process with volume production begun in Q4 2002.
Elpida has samples available now with volume scheduled for April 2003.
Japanese company Oki Electric Industry and Symetrix of the USA are to
jointly commercialise NDRO (non-destructive read out) FeRAMs (ferroelectric
random access memories). The devices will be based on Symetrix Trinion cell
technology - a higher speed and density architecture. Symetrix is to license
its NDRO-FeRAM technology to Oki
The companies will collaborate on the development of a 16Mbit FeRAM. It is
also agreed that Oki will provide Symetrix with foundry services from its
0.25micron fabrication facility. The two companies have already conducted
joint research and development for three years.
The companies expect to have engineering samples by the end of the year, and
both companies will be marketing this product for use in mobile phones,
PDAs, and game machines. Embedded products will enter the market first,
followed by stand-alone memories. The companies believe their products will
be the first sub-100nsec high-density FeRAM devices to enter the world
market.
The cell uses a low-fatigue layered perovskite (Y-1) technology owned by
Symetrix. The resulting devices have extremely fast cycle times of less than
20nsecs, while operating at 1.8V for both read and write operations.
Oki has previously licensed FeRAM technology from Symetrix, and will begin
shipping embedded FeRAM devices this year based on the licensed technology.
The technology is designed to provide lower power consumption and faster
write speeds than other non-volatile memories such as Flash.
ON Semiconductor claims to have a unique new trench process technology that
on average delivers a 40% improvement in on-resistance when compared with
other processes on the market. Before the end of the year, the company plans
to introduce a complete portfolio of P-channel and N-channel MOSFETs based
on the technology.
Focus applications of the initial devices - to be launched this quarter -
will be load management, circuit charging, battery protection and dc-dc
conversion in portable and wireless products. High-performance trench-based
devices for computing and automotive applications will follow.
The company also says it has improved the cell geometry to deliver
best-in-class on-resistance. The products should enable extended battery
life, higher power-conversion and higher thermal efficiencies.
Both 8V and 20 V P-channel products are to be offered by ON Semiconductor in
a ChipFET package (1.8x3.3mm). These have demonstrated an on-resistance of
19mOhms and 21mOhms, respectively. The same proportional improvement in
on-resistance is also anticipated in other MOSFETs to be developed. General
sampling of initial devices will begin in March 2003.
International SEMATECH (ISMT) plans to co-ordinate industry-wide studies
into the extension of chrome as mask absorber, other materials that could
replace it and the economic impacts of both pathways.
Tantalum-based films are considered to be the leading candidate for an
alternative. Issues for such a replacement (or for an enhanced chrome)
include film deposition, resist application, film conductance and thickness,
dry and wet etchability, and repairability.
Various characterisation and cost-of-ownership studies will be carried out
with ISMT member companies, the supplier community and universities. ISMTs
Mask Advisory Steering Council (MASC) made the decision at a workshop on the
subject.
X-ray lithography developer JMAR Technologies has successfully completed
initial testing of the its Collimated Plasma Lithography (CPL) source, which
will now be integrated into JMARs beta model stepper. The company reports
significant improvement in the resolution of the source from 130nm dense
lines to 100nm-dense lines, and 70nm isolated lines in its most recent
tests. Sub-80nm contact 2D arrays on 200nm pitch on the same exposure fields
have also been printed. This was accomplished by reducing the gap between
the mask and wafer.
"Although 130nm resolution is adequate for our CPL Stepper targeted at the
compound semiconductor industry, our sub-100nm results are important to our
mainstream silicon aspirations," says president and CEO Ronald A Walrod.
Advanced Semiconductor Engineering (ASE) and AMD have agreed to jointly
develop flip chip assembly on organic packages for microprocessor chip sets.
"Working closely with AMD, ASE will offer complete turnkey services
including wafer bumping, flip chip packaging and final testing for AMD and
their chipset partners," says JJ Lee, ASEs R&D vice-president.
STMicroelectronics has developed a three-axis linear accelerometer aimed
primarily at applications in handheld terminals. The device combines a
micro-electro-mechanical system (MEMS) sensor and an interface chip in a
single package.
The company is looking for applications in mobile phones, personal digital
assistants (PDAs) and other handheld battery-powered products, where the
LIS3L02 could be used to implement new intuitive user interfaces based on
movements allowing one-handed operation without styluses, thumb keyboards or
other input devices. The device could find other applications in toys,
industrial production equipment, robotics, automotive systems or as a
general-purpose vibration sensor for industrial equipment and domestic
appliances to detect fault conditions.
The accelerometer is housed in a compact QFN package. Movement and
inclination are translated into calibrated analogue voltage or digital
outputs. Compared to assemblies of multiple one-axis sensors the new device
simplifies assembly, reduces size and cuts production costs.
Movement or inclination in three axes causes small displacements of moving
silicon structures in the MEMS sensor die, changing the capacitance between
moving and fixed parts. The interface chip, which is in the same package,
translates these minute capacitance changes into calibrated analogue
voltages proportional to the movement. The interface chip is factory trimmed
to ensure repeatable performance without production line adjustment in the
end product.
All types operate on a 3.3-5V supply and have an equivalent noise
acceleration of better than 0.0005 of g, the acceleration due to gravity.
During transport and service it can withstand accelerations up to 1500g
without damage, making it sufficiently shock resistant for mobile phone
applications.
Japanese company Ulvac has developed an intermetal dielectric with a k value
of 2.1. The material is a spin-on hydrophobic porous silica. The company
will make available silicon wafers with the ISM-2 low-k film in February
2003. The company has also developed deposition equipment for the
silica-sol. Ulvac then hopes to start taking orders for the material.
Hardness is rated at 0.20-0.25GPa and the Youngs modulus is 2.0-2.5GPa.
These are important measures for resilience to chemical-mechanical polishing
(CMP) processes, which can damage low-k layers.
German company Singulus Technologies has launched a thin-film sputtering
system aimed at production of magnetic RAM on 300mm wafers. The TIMARIS
200/300mm bridge tool is dedicated to tunnel magnetic resistance (TMR)
technology - either for semiconductor application MRAM or for hard disk thin
film heads. TMR elements consist of a stack of extremely thin layers (as
thin as 1nm and less with sub-0.1nm control) of ferromagnetic and
nonmagnetic metallic films and an insulating barrier. Throughput for a
generic TMR layer stack is about 25 wafers/hour.
Applied Nanotech (ANI) says it has successfully demonstrated a 14" diagonal
monochrome TV based on electron emission from carbon nanotubes (CNT).
The TV was produced on low temperature glass substrates using dispensing
techniques common to the printing and screen printing industries. The video
images are claimed to demonstrate excellent grayscale capabilities and
superb frequency response without exhibiting the motion delays common in LCD
TVs.
"The new dispensing process simplifies the manufacturing method and we are
confident that the process can be scaled up to large area CNT TVs," says Dr
Zvi Yaniv, president and CEO of ANI.
