Process Development
aimed at the wireless power amplifier market for 2-3G base station
equipment. The transistor technology uses two key innovations aimed at
improving performance and reliability the first resolves the issue of how
to eliminate defects in chips when making ultra-thin silicon wafers and the
other improves performance when amplifying wireless signals.
Thin chips conduct heat better than thicker chips, reducing heat build up.
Agere has developed a proprietary wafer scale low cost, and high yield die
thinning technique. The company claims to have eliminated chip defects that
occur using other approaches. As a result, the transistor can be designed to
be 30% shorter in length and are 50 percent thinner than all competing transistors,
says Agere.
Thinner, shorter transistors get rid of heat more effectively than thicker
and longer transistors. The transistors achieve 10-15 percent lower operating
temperatures than all other competing products available, says Agere.
Further, Agere has developed transistors with reduced resistance and
parasitic capacitance using a patent-pending, high-density, low resistance
electrical connection technique. Reducing these factors creates transistors
with higher gain and efficiency - key for wireless power amplifier
applications.
The transistor process is a laterally diffused metal oxide semiconductor
(LDMOS) technology. Agere plans to sell these transistors both in tandem
with and separate from all the other components it sells for wireless base
stations. Transistors are in sample quantities now with production
quantities due in Q3 2003.
Japanese company Wacom Electric has completed development of its Wacom Flash
CVD System. The company claims it is the worlds first commercialised
ferroelectric thin film chemical vapour deposition system enabling mass
production of ferroelectric memory in large scale ICs (FeRAM-LSIs).
Deposition rates can reach up to 30nm/min. A 100nm/min system is expected
soon.
The Flash CVD system is a product of joint development efforts with Dr
Masayuki Toda, professor of Materials Science and Engineering at Yamagata
University. The company plans to have the system available as of March 11,
2003.
Target ferroelectrics include PZT (lead zirconate titanate) and SBT
(strontium bismuth tantalate). The company also hopes for a broad range of
applications other than FeRAMs, such as Ir, Pt, Cu, TaN and YBCOx (a
superconducting oxide).
Numerical Technologies has signed a joint development agreement with Applied
Materials to address resolution enhancement technologies (RETs) for 193nm
lithography processes. The work will be done at Applied Materials Maydan
Process Module Technology Center (PMTC) in California. The focus will be on
providing manufacturing solutions for sub 100nm chip production. The PMTC
currently has 248nm and 193nm lithography tools and associated track
technology. Applied Materials joint development agreement with Numerical
includes the use of its phase shifting, optical proximity correction and
silicon simulation technologies.
