Engineers and technicians at International SEMATECH (ISMT) have pioneered an etch process that allows the removal of high-k film from a wafer surface without damaging the underlying silicon.

Engineers and technicians at International SEMATECH (ISMT) have pioneered an etch process that allows the removal of high-k film from a wafer surface without damaging the underlying silicon. This process was able to remove hafnium dioxide (HfO2) after post-deposition annealing without causing damage to, or loss of, silicon material in the source-drain region. This silicon material is critical to the transistor series resistance and thus the maximum current it can sustain. The process was conducted within ISMTs Advanced Technology Development Facility on 200mm wafers at the 130nm node.


A high-k material has a dielectric constant (k value) larger than that of silicon dioxide, the industry standard gate dielectric material, thereby allowing retention of the gate capacitance even as the physical dielectric thickness increases. This physical thickness difference results in high-k materials having much lower leakage current than silicon dioxide at an equivalent electrical thickness.
High-k materials are required for continued gate dielectric scaling in high performance applications and for reduced leakage current in lower power applications such as mobile consumer products.
The high-k milestone was achieved in January 2003 by the Advanced Gate Clean project team (Naim Moumen (IBM) and Joel Barnett (ISMT)) using an innovative etch process to remove hafnium dioxide (HfO2) deposited by metallorganic chemical vapour deposition (MOCVD) and atomic layer deposition (ALD) processes.