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Nanocrystal Memory

Motorola says it has demonstrated the world’s first 4Mbit memory based on silicon nanocrystals. The company sees the fully functional test chip as a major milestone in the search for successors to floating gate-based flash memories. Many believe Flash will not continue to scale to smaller geometries.
Motorola says it has demonstrated the world's first 4Mbit memory based on silicon nanocrystals. The company sees the fully functional test chip as a major milestone in the search for successors to floating gate-based flash memories. Many believe Flash will not continue to scale to smaller geometries.
Silicon nanocrystal memories are part of a class of techniques called thin film storage. Motorola has developed techniques designed to help simplify the manufacture of these memories. Using traditional deposition equipment, researchers at Motorola's DigitalDNA Laboratories deposited silicon nanocrystals resembling 50Angstrom diameter spheres between two layers of oxide. The silicon spheres are engineered to hold and prevent lateral movement of charge to other isolated nanocrystals. This is expected to increase reliability and scalability because a single oxide defect does not lead to complete charge loss as in a conventional floating gate non-volatile memory.


Motorola built the test array on 200mm wafers using its 90nm process. The key challenge researchers overcame was getting the nanocrystals to grow repeatedly to consistent size and density. If the nanocrystals are too small or too dispersed, then the memory device will not hold sufficient charge density. The proper charge density is what allows the memory to detect “on/off” states. If the nanocrystals are too large or too dense, the electrons may move either to other nanocrystals or leak through defects in the tunnel oxide beneath the nanocrystals. By experimenting with different process chemicals and modifying conditions such as temperature, pressure and time, Motorola developed a method to repeatedly grow the nanocrystals with existing equipment. Researchers may now focus on reduced die sizes and tightened specifications to be ready for potential products in 2004.


At 90nm and smaller, manufacturing floating gate-based Flash becomes impractical. At those dimensions, the chip area spent on the 9-12V high voltage transistors needed to write and erase the flash becomes too expensive. Further, engineers cannot reduce the high voltage in floating-gate based Flash without compromising reliability, at the risk of memory failures and loss of data. Motorola is also investigating magnetoresistive random access memory (MRAM) as an alternative to Flash.

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