Isonics has successfully produced thin-film SOI wafers using an internally developed process. The company has accepted its first order for a lot of such wafers that is due to ship this month.

Isonics has successfully produced thin-film SOI wafers using an internally
developed process. The company has accepted its first order for a lot of
such wafers that is due to ship this month.
James E Alexander, chairman and CEO, reports: "Our thin-film process, which
is code named Sigma-1, is built on our proven thick-film process and
utilises many of the same tools and equipment we already own. This will
allow us to produce meaningful quantities of Sigma-1 wafers without the need
for further capital investment."
Thin-film SOI wafers are generally used for the most leading edge
electronics applications, while thick-film SOI wafers are used to
manufacture micro-electro-mechanical systems (MEMS) and certain other
electronic devices. Isonics presently offers thin-film Sigma-1 SOI wafers in
100-150mm diameters.

Researchers from electronic paper developer E Ink have realised a flexible
160x240pixel display (Nature, May 8, 2003). The resolution is 96pixels/inch.
The flexibility allows bending up to 1.5cm radius of curvature without
contrast degradation. The display is 0.3mm thick.
The structure of the device is a thin-film transistor (TFT) backplane on a
75micron thick steel substrate under a display area consisting of
microencapsulated electrophoretic material (electronic ink) - charged
pigment particles in a clear fluid.
A negative voltage applied to the top surface causes the positive white
particles to move to the top of the capsule making the surface white.
Reversing the field brings black particles to the top making a dark spot.
Currently, the ink switching speed is 250ms. The researchers admit that 15ms
would be required for video-rate switching. Foldable displays would need a
thinner substrate.

The CellularRAM co-development team of Cypress Semiconductor, Infineon
Technologies and Micron Technology announced availability of 32Mbit
CellularRAM devices for wireless handsets. Samples are available in both
asynchronous and burst modes. CellularRAM is a multi-generation family of
low-power pseudo-static RAM (PSRAM) devices. The parts are designed to meet
the growing memory and bandwidth demands of future 2.5G and 3G handset
designs by offering a lower cost/bit ratio than current solutions.
CellularRAM has the same voltage range, package and ball assignment with
asynchronous low-power SRAMs currently used in cell phone designs.
Each company is manufacturing products using their own design and process
technologies and product development timetables. In addition to 32Mbit
density components, the co-development roadmap includes plans for 16Mbit and
64Mbit.
Micron is currently sampling the 32Mbit and 64Mbit devices, with full
production expected in Q3 2003. Infineon is currently sampling the 32Mbit
with full production also expected in Q3 2003. Cypress plans to have samples
available in H1 2004.
The 32Mbit samples currently available operate at up to 104MHz clock rates
with low initial latency of 70ns and can achieve up to 208MByte/s
(1.5Gbit/s) of peak bandwidth. These devices emulate popular standard burst
READ and WRITE modes including the Intel W18 and Micron Flash
Burst-compatible protocol with various I/O voltage options.
CellularRAM co-development members are jointly working on the definition of
the next CellularRAM generation - a 128Mbit device, targeted for sampling in
H2 2004.

LogicVision has developed a silicon-proven solution to provide automated
test and repair of memory devices. LogicVision worked with MoSys to fully
qualify the combination of Mosys 1T-SRAM family of high-density embedded
memories with LogicVisions IC memory built-in self test (BIST) and built-in
repair analysis (BIRA) support. A design containing multiple 1T-SRAM
instances, BIST and BIRA was fabricated at a leading foundry to verify and
validate the complete end-to-end memory test and repair process.
The process uses memory redundancy to create the opportunity for repair and
reconfiguration of systems-on-chip (SoCs). Built-in repair analysis can help
realise the yield benefits of memory repair without incurring additional
costs due to the added complexity or test time associated with external
failure data collection schemes. LogicVisions built-in repair analysis
supports both fuse based (hard) and register based (soft) reconfiguration
schemes.

Elpida Memory and ProMOS Technologies have signed a Memorandum of
Understanding (MOU) regarding technology transfer and joint development of
next-generation dynamic random access memory (DRAM) processes. The
co-operation is intended for the design of all new processes from 0.10micron
and lower, including all new DRAM products. The agreement will also include
arrangements for product purchase and supply, as well as collaboration on
new product development of new types of DRAM. Details of the agreement are
currently under discussion by the parties. The deal is due to be finalised
by Q3 2003.

Photomask generator tool developer Micronic Laser Systems has entered a
joint programme with Intel, with the US chip producer buying a Sigma tool as
part of the agreement. A rights issue with preferential rights for existing
shareholders is to be made of which 25-35% will be used to fund R&D
including the joint development. The company expects to raise SEK327mn.